failing like never before

Muxing the Clock

My final lab project for my digital design class is basically a free-for-all, design your own project. The project that my lab partner and I have chosen includes displaying a countdown timer on four seven-segment displays. We wanted to have the displayed value decrementing once every second, and we also wanted to make it so that the user could pause the counter and change the displayed value with push-buttons. The only problem with this scenario is that since the counters are connected to a 1Hz clock, the speed at which a user can set the displayed values is also 1Hz. This is bad, as we quickly found out, because it is unbearably slow, especially when you want to set a value of 100. So I came up with what I thought was a great idea: mux the clock input on the counters and then use the "set" button as the mux selector. If one of the mux inputs was then a 1Hz signal and the other a 4Hz clock, we'd be able to switch back and forth between the clock signals at will. Like most things I come up with, I thought it was a brilliant idea. And like most of my ideas, it died in the implementation phase.

The results of muxing the clock signal resulted in a buggy counter that would often spaz out whenever the "set" button was pressed. The clock would settle back into a regular pattern after one or two cycles, but the damage would have already been done: nobody wants to have a clock timer that explodes in a mad counting rush every time you press a button. I believe the reason for the bugginess is due to the fact that the rising and falling edges of the 1Hz and 4Hz clock do not coincide in time perfectly, and so when the mux switches clocks the counters see a clock signal that fluctuates at a weird rate for a brief interval.

And one more thing that I've learned in digital design lab: Xilinx software is total crap. Project files get regularly corrupted, the program crashes at odd times, compiling takes so long that I could probably wire the design by hand faster, and the auto-wirer was designed by a disgruntled employee on crack. The quiet murmuring that fills the digital design lab room is frequently broken by loud exclaimations of "I hate this software," "I will find the engineer that designed this auto-wirer and kill him,"  "#$(@*$&(@!***#&!!" and other such phrases (generally not by me). I could maybe understand the total crappiness if Xilinx's ISE was a beta version and avaliable for free, but its not. We're running version 9.2 (somewhere around there) and the school paid buttloads for Xilinx's POS software. Please don't even bother with Xilinx.